Freescale Semiconductor /MKW21Z4 /XCVR_CTRL_REGS /XCVR_STATUS

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Interpret as XCVR_STATUS

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TSM_COUNT0 (0)PLL_SEQ_STATE 0 (RX_MODE)RX_MODE 0 (TX_MODE)TX_MODE 0 (BTLE_SYSCLK_REQ)BTLE_SYSCLK_REQ 0 (RIF_LL_ACTIVE)RIF_LL_ACTIVE 0 (0)XTAL_READY 0 (SOC_USING_RF_OSC_CLK)SOC_USING_RF_OSC_CLK 0 (0)TSM_IRQ0 0 (0)TSM_IRQ1

TSM_IRQ0=0, TSM_IRQ1=0, XTAL_READY=0, PLL_SEQ_STATE=0

Description

TRANSCEIVER STATUS

Fields

TSM_COUNT

TSM_COUNT

PLL_SEQ_STATE

PLL Sequence State

0 (0): PLL OFF

2 (2): CTUNE

3 (3): CTUNE_SETTLE

6 (6): HPMCAL1

8 (8): HPMCAL1_SETTLE

10 (10): HPMCAL2

12 (12): HPMCAL2_SETTLE

15 (15): PLLREADY

RX_MODE

Receive Mode

TX_MODE

Transmit Mode

BTLE_SYSCLK_REQ

BTLE System Clock Request

RIF_LL_ACTIVE

Link Layer Active Indication

XTAL_READY

RF Osciallator Xtal Ready

0 (0): Indicates that the RF Oscillator is disabled or has not completed its warmup.

1 (1): Indicates that the RF Oscillator has completed its warmup count and is ready for use.

SOC_USING_RF_OSC_CLK

SOC Using RF Clock Indication

TSM_IRQ0

TSM Interrupt #0

0 (0): TSM Interrupt #0 is not asserted.

1 (1): TSM Interrupt #0 is asserted. Write ‘1’ to this bit to clear it.

TSM_IRQ1

TSM Interrupt #1

0 (0): TSM Interrupt #1 is not asserted.

1 (1): TSM Interrupt #1 is asserted. Write ‘1’ to this bit to clear it.

Links

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